1. Field of the Invention
The present invention relates to a method of driving a gate line, a gate drive circuit for performing the method, and a display apparatus having the gate drive circuit. More particularly, exemplary embodiments of the present invention relate to a method of driving a gate line capable of enhancing driving defects, a gate drive circuit for performing the method, and a display apparatus having the gate drive circuit.
2. Discussion of the Background
Generally, a liquid crystal display (LCD) apparatus includes an LCD panel that displays images using a light-transmitting ratio of liquid crystal molecules, and a backlight assembly disposed below the LCD panel to provide the LCD panel with light.
The LCD apparatus includes a display panel, a gate driving part, and a data driving part. The display panel includes a plurality of gate lines, a plurality of data lines, and a plurality of pixel parts electrically connected to the gate lines and the data lines. The gate driving part outputs a gate signal to the gate lines. The data driving part outputs a data signal to the data lines. The gate driving part and the data driving part may be formed in a chip to be mounted on the display panel.
Recently, in order to decrease a size of the LCD apparatus and enhance its productivity, the gate driving part may be integrated on a display substrate in an amorphous silicon gate (ASG) type. However, when a gate drive circuit integrated on the display substrate is driven at a high temperature, an abnormal gate on signal may be generated during a gate off signal interval.
Moreover, in a vertical blanking interval, a clock signal for a gate drive circuit is not applied to the gate drive circuit, so that an output signal of the gate drive circuit may be floated. When the output signal of the gate drive circuit is floated, an off voltage of a gate electrode may increase due to a parasitic capacitor (Cgd) between the gate line and the data line, which may turn on a pull-up element of the gate drive circuit. Thus, a gate on signal may be intermittently generated during the gate off signal interval, thereby generating display defects.